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https://github.com/NawfalMotii79/PLFM_RADAR.git
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Jason
1342ce7b9d
H-1: ft601_rd_n/ft601_oe_n IOB-packing block claimed "constant-1, USB read not implemented" but the driver has had a full RD_OE_ASSERT/READING/DEASSERT read FSM since the host-command path was added. Rewrote the comment to describe the real FSM-driven traffic and explain that -quiet is now for post-synthesis retiming/consolidation cases, not because the registers don't exist. H-2: production XDC (create_generated_clock ft601_clk_fwd + set_output_delay) and FMC dev XDC (set_max_delay -datapath_only) implement two different but deliberate timing strategies for the same FT601 output ports — production forwards ft601_clk_out via ODDR, FMC UMFT601X-B has no return path. Added cross-reference VARIANT STRATEGY blocks in both XDCs explaining the choice and the no-mixing rule. H-4: set_false_path -from ft601_txe -to clk_100m registers was undocumented. Traced both capture paths: ft601_clk_in (write FSM in usb_data_interface.v) and clk_100m (cdc_single_bit in radar_system_top.v driving status_reg[1]). Added comment explaining the async port → clk_100m sync-FF path is what this constraint covers. Comment-only XDC change; regression 46/0/0 unchanged.