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fix: MCU-N4 delay_us bound; GUI-S4 STREAM_CONTROL comment
MCU-N4: delay_us(us) reset TIM1 then waited for the counter to reach `us`, but TIM1 ARR is 0xffff-1 (~65 ms at the 1 MHz tick). Any caller passing us > 65534 spun forever after the first wrap — a real hazard with the PA energized. Chunk requests larger than ARR into ARR-sized waits, then the remainder in the existing single wait. Current callers (T1, PRI1-T1, Guard, 500us spots) are all well under the bound; this is defensive. GUI-S4: radar_protocol.STREAM_CONTROL was annotated "3-bit stream enable mask"; the FPGA accepts usb_cmd_value[5:0] = 6 bits. The wire protocol already carried the full 32-bit value field, so the upper bits were reachable via Custom Command — only the comment was wrong. Updated to match radar_system_top.v:1004. Verified: 75/75 MCU tests pass; 83/83 v7 GUI tests pass (covered by GUI-C3 commit).
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@@ -302,7 +302,16 @@ return Micros; //Clock TIM1 -> AHB/APB1 is set to 72MHz/presc+1 presc = 71
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//////////////////////////////////////////////
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void delay_us(volatile uint32_t us){
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__HAL_TIM_SET_COUNTER(&htim1,0); // set the counter value a
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// MCU-N4: chunk requests larger than the TIM1 ARR (0xffff-1 = 65534 ticks
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// at 1 MHz = ~65 ms). Without this, GET_COUNTER never reaches `us` once
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// it wraps and the loop spins forever — a hazard with the PA energized.
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const uint32_t ARR_TICKS = 0xffff - 1;
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while (us > ARR_TICKS) {
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__HAL_TIM_SET_COUNTER(&htim1, 0);
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while (__HAL_TIM_GET_COUNTER(&htim1) < ARR_TICKS);
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us -= ARR_TICKS;
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}
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__HAL_TIM_SET_COUNTER(&htim1, 0); // set the counter value a
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while (__HAL_TIM_GET_COUNTER(&htim1) < us); // //Clock TIMx -> AHB/APB1 is set to 72MHz/presc+1 presc = 71
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}
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