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fix: MCU-N4 delay_us bound; GUI-S4 STREAM_CONTROL comment

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MCU-N4: delay_us(us) reset TIM1 then waited for the counter to reach `us`,
but TIM1 ARR is 0xffff-1 (~65 ms at the 1 MHz tick). Any caller passing
us > 65534 spun forever after the first wrap — a real hazard with the PA
energized. Chunk requests larger than ARR into ARR-sized waits, then the
remainder in the existing single wait. Current callers (T1, PRI1-T1,
Guard, 500us spots) are all well under the bound; this is defensive.

GUI-S4: radar_protocol.STREAM_CONTROL was annotated "3-bit stream enable
mask"; the FPGA accepts usb_cmd_value[5:0] = 6 bits. The wire protocol
already carried the full 32-bit value field, so the upper bits were
reachable via Custom Command — only the comment was wrong. Updated to
match radar_system_top.v:1004.

Verified: 75/75 MCU tests pass; 83/83 v7 GUI tests pass (covered by GUI-C3 commit).
This commit is contained in:
Jason
2026-04-23 07:43:53 +05:45
parent bf39941074
commit 6f68f3263a
2 changed files with 11 additions and 2 deletions
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9_Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.cpp
+10 -1
View File
@@ -302,7 +302,16 @@ return Micros; //Clock TIM1 -> AHB/APB1 is set to 72MHz/presc+1 presc = 71
//////////////////////////////////////////////
void delay_us(volatile uint32_t us){
__HAL_TIM_SET_COUNTER(&htim1,0); // set the counter value a
// MCU-N4: chunk requests larger than the TIM1 ARR (0xffff-1 = 65534 ticks
// at 1 MHz = ~65 ms). Without this, GET_COUNTER never reaches `us` once
// it wraps and the loop spins forever — a hazard with the PA energized.
const uint32_t ARR_TICKS = 0xffff - 1;
while (us > ARR_TICKS) {
__HAL_TIM_SET_COUNTER(&htim1, 0);
while (__HAL_TIM_GET_COUNTER(&htim1) < ARR_TICKS);
us -= ARR_TICKS;
}
__HAL_TIM_SET_COUNTER(&htim1, 0); // set the counter value a
while (__HAL_TIM_GET_COUNTER(&htim1) < us); // //Clock TIMx -> AHB/APB1 is set to 72MHz/presc+1 presc = 71
}
9_Firmware/9_3_GUI/radar_protocol.py
+1 -1
View File
@@ -67,7 +67,7 @@ class Opcode(IntEnum):
RADAR_MODE = 0x01 # 2-bit mode select
TRIGGER_PULSE = 0x02 # self-clearing one-shot trigger
DETECT_THRESHOLD = 0x03 # 16-bit detection threshold value
STREAM_CONTROL = 0x04 # 3-bit stream enable mask
STREAM_CONTROL = 0x04 # 6-bit stream enable mask (FPGA: usb_cmd_value[5:0])
# --- Digital gain (0x16) ---
GAIN_SHIFT = 0x16 # 4-bit digital gain shift