mirror of
https://github.com/NawfalMotii79/PLFM_RADAR.git
synced 2026-06-08 14:44:56 +00:00
chore(mcu): C-14a — delete dead ADF4382A EZSync surface
Production firmware never used SYNC_METHOD_EZSYNC — both callsites
(main.cpp:938 recovery, main.cpp:1955 boot) pass SYNC_METHOD_TIMED.
The original audit C-14 flagged TX/RX SPI skew in EZSync's trigger
sequence, but the path was dead from production; only test_bug3
referenced it for spy-harness regression coverage.
Removed:
- SYNC_METHOD_EZSYNC enum value
- ADF4382A_SetupEZSync function (and declaration)
- ADF4382A_TriggerEZSync function (and declaration)
- EZSync branch in ADF4382A_Manager_Init (collapsed to unconditional
SetupTimedSync call)
- test_bug3_timed_sync_noop.c Test C (EZSync regression coverage)
Production header and test shim header both cleaned. SyncMethod enum
kept as single-value to avoid touching the 7 other test callers that
pass SYNC_METHOD_TIMED.
Residual concern (separate from original C-14): ADF4382A_TriggerTimedSync
uses the same TX-then-RX sw_sync SPI sequencing pattern as the deleted
EZSync trigger. ~5 µs SPI gap between TX-armed and RX-armed means TX
and RX may capture different SYNCP/SYNCN edges (60 MHz cycle = 16.7 ns,
~300 edges in the gap). External SYNCP only provides simultaneity if
both devices are armed before a common edge. Hardware bench-test
required to confirm operational tolerance; cannot fix in firmware
without DMA SPI burst rewrite.
Regression: 86/0 (matches baseline).
This commit is contained in:
Jason
@@ -184,39 +184,24 @@ int ADF4382A_Manager_Init(ADF4382A_Manager *manager, SyncMethod method)
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adf4382_set_en_chan(manager->rx_dev, 0, true);
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adf4382_set_en_chan(manager->rx_dev, 1, false);
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// Mark initialized BEFORE sync setup so SetupTimedSync/SetupEZSync
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// see initialized=true and actually configure the hardware.
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// (FIX for Bug #1: previously this was set AFTER the sync calls,
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// causing them to always return -2 NOT_INIT.)
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// SetupTimedSync is a public API (also callable post-init); it gates
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// on `initialized=true`. Mark the manager initialized here — the SPI
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// is up and both ADF4382A devices are configured, so a public API
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// call is legitimate. Roll back to false on sync-setup failure so the
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// manager isn't left half-configured.
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manager->initialized = true;
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DIAG("LO", "manager->initialized set to true (before sync setup)");
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// Setup synchronization based on selected method
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DIAG("LO", "About to call sync setup -- manager->initialized=%s",
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manager->initialized ? "true" : "false");
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if (method == SYNC_METHOD_TIMED) {
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ret = ADF4382A_SetupTimedSync(manager);
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DIAG("LO", "ADF4382A_SetupTimedSync() returned %d", ret);
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if (ret) {
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DIAG_ERR("LO", "Timed sync setup FAILED: %d", ret);
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printf("Timed sync setup failed: %d\n", ret);
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manager->initialized = false;
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return ret;
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}
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} else {
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ret = ADF4382A_SetupEZSync(manager);
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DIAG("LO", "ADF4382A_SetupEZSync() returned %d", ret);
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if (ret) {
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DIAG_ERR("LO", "EZSync setup FAILED: %d", ret);
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printf("EZSync setup failed: %d\n", ret);
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manager->initialized = false;
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return ret;
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}
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ret = ADF4382A_SetupTimedSync(manager);
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DIAG("LO", "ADF4382A_SetupTimedSync() returned %d", ret);
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if (ret) {
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DIAG_ERR("LO", "Timed sync setup FAILED: %d", ret);
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printf("Timed sync setup failed: %d\n", ret);
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manager->initialized = false;
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return ret;
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}
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printf("ADF4382A Manager initialized with %s synchronization on SPI4\n",
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(method == SYNC_METHOD_TIMED) ? "TIMED" : "EZSYNC");
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printf("ADF4382A Manager initialized with TIMED synchronization on SPI4\n");
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DIAG_ELAPSED("LO", "Total Manager_Init", t_start);
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DIAG("LO", "Init returning OK (sync setup %s)",
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@@ -265,44 +250,6 @@ int ADF4382A_SetupTimedSync(ADF4382A_Manager *manager)
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return ADF4382A_MANAGER_OK;
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}
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int ADF4382A_SetupEZSync(ADF4382A_Manager *manager)
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{
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int ret;
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DIAG("LO", "SetupEZSync called, manager=%p initialized=%s",
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(void*)manager, (manager ? (manager->initialized ? "true" : "false") : "N/A"));
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if (!manager || !manager->initialized) {
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DIAG_ERR("LO", "SetupEZSync REJECTED: %s",
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!manager ? "NULL manager" : "not initialized (initialized=false)");
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return ADF4382A_MANAGER_ERROR_NOT_INIT;
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}
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printf("Setting up EZSync (SPI-based synchronization)...\n");
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// Setup TX for EZSync
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ret = adf4382_set_ezsync_setup(manager->tx_dev, true);
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DIAG("LO", "TX adf4382_set_ezsync_setup() returned %d", ret);
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if (ret) {
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printf("TX EZSync setup failed: %d\n", ret);
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return ret;
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}
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// Setup RX for EZSync
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ret = adf4382_set_ezsync_setup(manager->rx_dev, true);
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DIAG("LO", "RX adf4382_set_ezsync_setup() returned %d", ret);
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if (ret) {
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printf("RX EZSync setup failed: %d\n", ret);
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return ret;
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}
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manager->sync_method = SYNC_METHOD_EZSYNC;
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printf("EZSync configured\n");
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DIAG("LO", "EZSync setup complete for both TX and RX");
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return ADF4382A_MANAGER_OK;
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}
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int ADF4382A_TriggerTimedSync(ADF4382A_Manager *manager)
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{
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int ret;
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@@ -358,55 +305,6 @@ int ADF4382A_TriggerTimedSync(ADF4382A_Manager *manager)
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return ADF4382A_MANAGER_OK;
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}
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int ADF4382A_TriggerEZSync(ADF4382A_Manager *manager)
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{
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int ret;
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if (!manager || !manager->initialized || manager->sync_method != SYNC_METHOD_EZSYNC) {
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DIAG_ERR("LO", "TriggerEZSync REJECTED");
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return ADF4382A_MANAGER_ERROR_NOT_INIT;
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}
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DIAG("LO", "Triggering EZSync via SPI...");
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// Trigger software sync on both devices
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ret = adf4382_set_sw_sync(manager->tx_dev, true);
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if (ret) {
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DIAG_ERR("LO", "TX sw_sync SET failed: %d", ret);
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printf("TX software sync failed: %d\n", ret);
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return ADF4382A_MANAGER_ERROR_SPI;
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}
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ret = adf4382_set_sw_sync(manager->rx_dev, true);
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if (ret) {
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DIAG_ERR("LO", "RX sw_sync SET failed: %d", ret);
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printf("RX software sync failed: %d\n", ret);
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return ADF4382A_MANAGER_ERROR_SPI;
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}
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// Small delay for sync to take effect
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no_os_udelay(10);
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// Clear software sync
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ret = adf4382_set_sw_sync(manager->tx_dev, false);
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if (ret) {
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DIAG_ERR("LO", "TX sw_sync CLEAR failed: %d", ret);
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printf("TX sync clear failed: %d\n", ret);
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return ADF4382A_MANAGER_ERROR_SPI;
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}
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ret = adf4382_set_sw_sync(manager->rx_dev, false);
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if (ret) {
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DIAG_ERR("LO", "RX sw_sync CLEAR failed: %d", ret);
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printf("RX sync clear failed: %d\n", ret);
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return ADF4382A_MANAGER_ERROR_SPI;
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}
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printf("EZSync triggered via SPI\n");
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DIAG("LO", "EZSync trigger complete (set + 10us + clear)");
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return ADF4382A_MANAGER_OK;
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}
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int ADF4382A_Manager_Deinit(ADF4382A_Manager *manager)
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{
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if (!manager || !manager->initialized) {
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@@ -52,7 +52,6 @@
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#define ADF4382A_MANAGER_ERROR_SPI -3
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typedef enum {
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SYNC_METHOD_EZSYNC = 0, // Software synchronization via SPI
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SYNC_METHOD_TIMED = 1 // Hardware synchronization via SYNCP/SYNCN
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} SyncMethod;
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@@ -71,9 +70,7 @@ typedef struct {
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int ADF4382A_Manager_Init(ADF4382A_Manager *manager, SyncMethod method);
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int ADF4382A_Manager_Deinit(ADF4382A_Manager *manager);
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int ADF4382A_SetupTimedSync(ADF4382A_Manager *manager);
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int ADF4382A_SetupEZSync(ADF4382A_Manager *manager);
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int ADF4382A_TriggerTimedSync(ADF4382A_Manager *manager);
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int ADF4382A_TriggerEZSync(ADF4382A_Manager *manager);
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int ADF4382A_CheckLockStatus(ADF4382A_Manager *manager, bool *tx_locked, bool *rx_locked);
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int ADF4382A_SetOutputPower(ADF4382A_Manager *manager, uint8_t tx_power, uint8_t rx_power);
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int ADF4382A_EnableOutputs(ADF4382A_Manager *manager, bool tx_enable, bool rx_enable);
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@@ -64,7 +64,6 @@
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#define ADF4382A_MANAGER_ERROR_SPI -3
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typedef enum {
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SYNC_METHOD_EZSYNC = 0,
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SYNC_METHOD_TIMED = 1
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} SyncMethod;
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@@ -83,9 +82,7 @@ typedef struct {
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int ADF4382A_Manager_Init(ADF4382A_Manager *manager, SyncMethod method);
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int ADF4382A_Manager_Deinit(ADF4382A_Manager *manager);
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int ADF4382A_SetupTimedSync(ADF4382A_Manager *manager);
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int ADF4382A_SetupEZSync(ADF4382A_Manager *manager);
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int ADF4382A_TriggerTimedSync(ADF4382A_Manager *manager);
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int ADF4382A_TriggerEZSync(ADF4382A_Manager *manager);
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int ADF4382A_CheckLockStatus(ADF4382A_Manager *manager, bool *tx_locked, bool *rx_locked);
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int ADF4382A_SetOutputPower(ADF4382A_Manager *manager, uint8_t tx_power, uint8_t rx_power);
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int ADF4382A_EnableOutputs(ADF4382A_Manager *manager, bool tx_enable, bool rx_enable);
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@@ -5,15 +5,15 @@
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* messages but performed no hardware action.
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*
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* Fix: Implemented a sw_sync pulse (set true → 10us delay → set false) on
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* both TX and RX devices, mirroring EZSync's trigger pattern. With
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* timed_sync_setup already programmed, the devices synchronize their output
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* dividers to the SYNCP/SYNCN clock edge when sw_sync is asserted.
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* both TX and RX devices. With timed_sync_setup already programmed, the
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* devices synchronize their output dividers to the SYNCP/SYNCN clock edge
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* when sw_sync is asserted.
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*
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* Test strategy (post-fix):
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* 1. Initialize manager with SYNC_METHOD_TIMED.
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* 2. Reset spy log, call TriggerTimedSync().
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* 3. Verify 4 SPY_ADF4382_SET_SW_SYNC records (TX set, RX set, TX clear,
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* RX clear) — same count as EZSync.
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* RX clear).
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* 4. Verify the set/clear ordering is correct.
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******************************************************************************/
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#include "adf4382a_manager.h"
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@@ -83,19 +83,7 @@ int main(void)
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assert(sw_idx == 4);
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printf(" PASS: Ordering is correct (set TX, set RX, clear TX, clear RX)\n");
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/* ---- Test C: Compare with EZSync — both should produce 4 sw_sync calls ---- */
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mgr.sync_method = SYNC_METHOD_EZSYNC;
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spy_reset();
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ret = ADF4382A_TriggerEZSync(&mgr);
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assert(ret == ADF4382A_MANAGER_OK);
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int ezsync_count = spy_count_type(SPY_ADF4382_SET_SW_SYNC);
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printf("\n EZSync sw_sync count: %d (expected 4, same as timed sync)\n",
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ezsync_count);
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assert(ezsync_count == 4);
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printf(" PASS: Both sync methods now issue the same hw trigger pattern\n");
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/* Cleanup */
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mgr.sync_method = SYNC_METHOD_TIMED;
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ADF4382A_Manager_Deinit(&mgr);
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printf("\n=== Bug #3: ALL TESTS PASSED (post-fix) ===\n\n");
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