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https://github.com/NawfalMotii79/PLFM_RADAR.git
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PR-AB.b expanded commit 5: Beam-ready handshake (RTL + MCU + GUI)
Wire a per-frame MCU→FPGA "beam pattern ready" handshake so the chirp scheduler can stall between 48-chirp frames until the MCU finishes writing the next ADAR1000 pattern. The legacy unused stm32_new_chirp input on PD8 is repurposed as stm32_beam_ready; chirp_scheduler.v gets a new S_BEAM_WAIT state entered after each frame_pulse and an 80 ms watchdog so a missed MCU toggle degrades to wall-clock cadence with a sticky telemetry bit rather than stalling the radar. Cold-reset defaults the handshake off (host_handshake_enable=0, new opcode 0x1A); the GUI opts in once the MCU PD8 wiring is verified on the bench. Both the FT601 and FT2232H status word 4 paths get the new beam_handshake_watchdog_fired sticky at bit [1] (reclaimed from the range_mode retirement in commit 1). RTL: - chirp_scheduler.v: 2-FF ASYNC_REG sync on beam_ready_async; 1-cycle edge detect (any transition, MCU side uses HAL_GPIO_TogglePin); new S_BEAM_WAIT state entered at frame_pulse when host_handshake_enable=1; 23-bit beam_watchdog counter with BEAM_WATCHDOG_MAX = 8_000_000 (~80 ms at 100 MHz, ~10 nominal frames); beam_handshake_watchdog_fired output sticky across mixers_enable cycles, cleared only by reset_n; mid-wait disable releases the FSM so dropping the opcode never strands the radar between frames. - radar_receiver_final.v: thread stm32_beam_ready_async + host_handshake_enable + beam_handshake_watchdog_fired through the scheduler instance. - radar_system_top.v: rename input port stm32_new_chirp → stm32_beam_ready; add host_handshake_enable register (cold-reset = 1'b0); opcode 0x1A dispatch (value[0]); add rx_beam_handshake_watchdog wire; pack into status_words[4][1] in both USB paths. - radar_system_top_50t.v: rename wrapper port + sub-instance wiring. - usb_data_interface.v + usb_data_interface_ft2232h.v: add status_beam_handshake_watchdog input + 2-FF level CDC (same convention as F-6.4 / F-1.2 stickies); refresh word-4 layout doc comment; pack beam_handshake_wd_sync_1 into status_words[4][1]. XDC: - xc7a50t_ftg256.xdc + xc7a200t_fbg484.xdc: rename stm32_new_chirp port references to stm32_beam_ready (same PD8 pin, F13 on 50T / L18 on 200T). MCU: - main.h: add FPGA_BEAM_READY_Pin = GPIO_PIN_8 + FPGA_BEAM_READY_GPIO_Port = GPIOD alongside the existing FPGA_FRAME_PULSE alias. - main.cpp:runRadarPulseSequence: insert HAL_GPIO_TogglePin(GPIOD, GPIO_PIN_8) after each setCustomBeamPattern16(RX) — once after the per-azimuth broadside (vector_0), once after matrix1, once after matrix2 — between the SPI burst completion and waitForFramePulse. GUI: - radar_protocol.py: Opcode.HANDSHAKE_ENABLE = 0x1A; StatusResponse.beam_handshake_watchdog = 0 default; parse word 4 bit [1] in parse_status_packet; update word-4 layout comment. - test_GUI_V65_Tk.py: add beam_handshake_watchdog kwarg to _make_status_packet (sets bit [1] of word 4); refresh test_parse_status_word4_layout_co_spec to cover the new bit (used+9=32); add test_parse_status_beam_handshake_watchdog round-trip; test_handshake_enable_opcode pins 0x1A; defaults / chirps_mismatch / agc-coexist tests gain a watchdog==0 assertion; bump test_all_rtl_opcodes_present expected set to include 0x17/0x18/0x19/0x1A. TB: - new tb_chirp_scheduler_handshake.v (16 checks): legacy open-loop, edge exit (rising + falling), 200-cycle idle hold, watchdog auto-advance via force on dut.beam_watchdog, sticky-survives-mixers_disable, mid-wait disable release, reset_n clears sticky. - run_regression.sh: register the new TB in PHASE 1. - tb_radar_receiver_final.v: tie the 3 new receiver ports off (beam_ready_async=0, handshake_enable=0, watchdog unconnected). - tb_system_mechanics.v / tb_system_opcodes.v: explicit .stm32_beam_ready(1'b0) connection (the cold-reset host_handshake_enable=0 keeps the FSM out of S_BEAM_WAIT). - tb_usb_data_interface.v / tb_usb_protocol_v2.v / tb_e2e_dsp_to_host.v / tb_ft2232h_frame_drop.v: tie .status_beam_handshake_watchdog(1'b0). Ride-along ruff sweep (14 → 0 across the repo): - tb/cosim/compare_independent.py: RUF003 — '5×' → 'at least 5x'. - tb/cosim/gen_e2e_expected.py: noqa: E402 on the post-sys.path import; drop unused EXPECTED_RANGE_BIN + EXPECTED_DOPPLER_BIN_PER_SF imports; fold the detect-class slot if/else into a ternary (SIM108). - tb/cosim/gen_e2e_stimulus.py: drop int() wrapping round() at four call sites (RUF046 — round() already returns int in Python 3); rewrite the range-bin derivation comment block from code-like `# range_bin = ...` to prose (ERA001); strip stray f from placeholder-free error string (F541). - tb/cosim/tb_e2e_dsp_to_host_parse.py: open(path, 'r') → open(path) (UP015). - v7/dashboard.py: '3×' → '3x' (RUF003); drop quotes from 'StatusResponse | None' annotation (UP037, file already has `from __future__ import annotations`). CI summary (all suites green pre-commit): - ruff: All checks passed! - FPGA regression (iverilog): 43 / 0 / 0 (incl. new handshake TB 16/16). - MCU tests: 51 / 0 + 34 / 0 + 13 / 13 ADAR1000_AGC. - GUI Tk (test_GUI_V65_Tk): 120 / 0. - GUI v7 (test_v7): 152 / 0. Production rollout note: bitstream cold-resets with host_handshake_enable=0 so existing flashes keep their open-loop cadence until the GUI sends opcode 0x1A=1. Once enabled, the per-pattern dwell tracks both the chirp ladder (PD14 frame_pulse from commit-3 work) and the MCU pattern-write completion (PD8 toggle from this commit), eliminating drift from the SPI burst timing.
This commit is contained in:
Jason
@@ -358,7 +358,7 @@ def check_mf_invariants(result: CheckResult):
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f"twin={twin_peak}, ref={ref_peak}"
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)
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# Sidelobe behaviour: peak should be ≥ 5× the median magnitude. Under
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# Sidelobe behaviour: peak should be at least 5x the median magnitude. Under
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# scaled-mode at amp=4000 the peak rises to ~977 while sidelobes stay
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# near the LSB floor, easily clearing the threshold.
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twin_peak_val = float(twin_mag[delay])
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@@ -62,7 +62,7 @@ import numpy as np
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THIS_DIR = os.path.dirname(os.path.abspath(__file__))
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sys.path.insert(0, THIS_DIR)
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from fpga_model import DopplerProcessor, run_cfar_ca
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from fpga_model import DopplerProcessor, run_cfar_ca # noqa: E402
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# Pull stimulus configuration verbatim so dimensions stay aligned.
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from gen_e2e_stimulus import ( # noqa: E402
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@@ -72,8 +72,6 @@ from gen_e2e_stimulus import ( # noqa: E402
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CHIRPS_PER_FRAME,
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RANGE_BINS,
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HOST_DC_NOTCH_WIDTH,
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EXPECTED_RANGE_BIN,
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EXPECTED_DOPPLER_BIN_PER_SF,
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EXPECTED_DETECT_CELLS,
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)
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@@ -263,10 +261,8 @@ def pack_bulk_frame(frame_number: int, flags: int,
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packed = 0
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for slot in range(4):
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db = byte_idx * 4 + slot
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if db < DOPPLER_TOTAL_BINS:
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code = int(cfar_class[rb, db]) & 0x3
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else:
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code = 0 # padding
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# padding for db >= DOPPLER_TOTAL_BINS lands on slot 3
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code = int(cfar_class[rb, db]) & 0x3 if db < DOPPLER_TOTAL_BINS else 0
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packed |= code << ((3 - slot) * 2)
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out.append(packed)
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@@ -98,16 +98,15 @@ HOST_DC_NOTCH_WIDTH = 1
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# ============================================================================
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# Target placement -> expected bin coordinates
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# ============================================================================
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# range_bin = round(2 * R / c * fs / decim)
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# = round(2 * 100 / 3e8 * 400e6 / 4)
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# = round(66.667) = 67
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EXPECTED_RANGE_BIN = int(round(2.0 * TARGET_RANGE_M / C_LIGHT * RANGE_BIN_HZ))
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# Range bin formula: round(2 * R / c * fs / decim). For R=100m, fs=400 MHz,
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# decim=4 -> round(2 * 100 / 3e8 * 100e6) = round(66.667) = 67.
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EXPECTED_RANGE_BIN = round(2.0 * TARGET_RANGE_M / C_LIGHT * RANGE_BIN_HZ)
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# Per-sub-frame doppler bin (folding into 16-pt FFT). For our 5 m/s target
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# this is intentionally non-folding -> 1 in all three sub-frames.
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F_DOPPLER_HZ = 2.0 * TARGET_VEL_MPS * F_CARRIER / C_LIGHT
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EXPECTED_DOPPLER_BIN_PER_SF = tuple(
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int(round(F_DOPPLER_HZ * DOPPLER_FFT_SIZE * pri)) % DOPPLER_FFT_SIZE
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round(F_DOPPLER_HZ * DOPPLER_FFT_SIZE * pri) % DOPPLER_FFT_SIZE
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for pri in PRI_BY_SF
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)
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# Flat 48-bin doppler-axis expected cells (sub_frame << 4 | bin).
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@@ -160,8 +159,8 @@ def generate_range_decim_frame(seed: int = SCENE_SEED) -> tuple[np.ndarray, np.n
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# Target injection at the expected range bin.
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phi = _target_phase_rad(c)
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sig_i = int(round(TARGET_AMPLITUDE * np.cos(phi)))
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sig_q = int(round(TARGET_AMPLITUDE * np.sin(phi)))
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sig_i = round(TARGET_AMPLITUDE * np.cos(phi))
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sig_q = round(TARGET_AMPLITUDE * np.sin(phi))
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frame_i[c, EXPECTED_RANGE_BIN] += sig_i
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frame_q[c, EXPECTED_RANGE_BIN] += sig_q
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@@ -231,7 +230,7 @@ def main() -> int:
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f"shape={frame_i.shape}")
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if n_lines != expected_lines:
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print(f" ERROR: line count mismatch", file=sys.stderr)
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print(" ERROR: line count mismatch", file=sys.stderr)
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return 1
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# Sanity: target peak should dominate at the expected range bin.
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@@ -95,7 +95,7 @@ class TestState:
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def load_captured_frame_hex(path: str) -> bytes:
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"""Read iverilog $writememh output (one byte per line, 2-hex-digit)."""
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out = bytearray()
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with open(path, 'r') as f:
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with open(path) as f:
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for line in f:
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tok = line.strip()
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if not tok or tok.startswith('//'):
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@@ -0,0 +1,279 @@
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`timescale 1ns / 1ps
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// ============================================================================
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// tb_chirp_scheduler_handshake.v — PR-AB.b expanded commit 5 unit TB
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//
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// Exercises the beam-ready handshake added to chirp_scheduler.v:
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// - S_BEAM_WAIT entered on frame_pulse when host_handshake_enable=1
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// - Exit on any beam_ready_async edge (toggle semantic)
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// - Watchdog auto-advances + sets beam_handshake_watchdog_fired sticky
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// - host_handshake_enable=0 keeps legacy open-loop cadence
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// - Mid-wait disable releases the FSM
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// - Reset clears the sticky
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//
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// Uses compressed cycle counts so a full 48-chirp frame completes in <1 ms
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// of sim time. The production cycle counts (175/161/167 µs PRIs) would push
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// the sim past the iverilog regression budget; the FSM logic exercised here
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// is independent of the cycle-count values.
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// ============================================================================
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`include "radar_params.vh"
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module tb_chirp_scheduler_handshake;
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// ---- Clock (100 MHz, 10 ns) ----
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reg clk = 1'b0;
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always #5 clk = ~clk;
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// ---- Compressed timing — 6 chirp/listen/guard cycles each per PRI ----
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localparam [15:0] T_CHIRP = 16'd6;
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localparam [15:0] T_LISTEN = 16'd6;
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localparam [15:0] T_GUARD = 16'd6;
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// Single chirp + listen + guard ≈ 20 cycles. With chirps_per_subframe=2 and
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// 3 sub-frames active, a frame lands at ~120 cycles → 1.2 µs/frame in sim.
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localparam [5:0] CHIRPS_PER_SUBFRAME = 6'd2;
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// ---- DUT signals ----
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reg reset_n = 1'b0;
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reg mixers_enable = 1'b0;
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reg [2:0] subframe_enable = 3'b111;
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reg beam_ready_async = 1'b0;
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reg handshake_enable = 1'b0;
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wire [1:0] wave_sel;
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wire chirp_pulse;
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wire subframe_pulse;
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wire frame_pulse;
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wire [5:0] chirp_counter;
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wire [1:0] subframe_id;
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wire [15:0] cfg_chirp_cycles;
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wire [15:0] cfg_listen_cycles;
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wire [15:0] cfg_guard_cycles;
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wire watchdog_fired;
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chirp_scheduler dut (
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.clk (clk),
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.reset_n (reset_n),
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.host_subframe_enable (subframe_enable),
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.host_short_chirp_cycles (T_CHIRP),
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.host_short_listen_cycles (T_LISTEN),
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.host_medium_chirp_cycles (T_CHIRP),
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.host_medium_listen_cycles (T_LISTEN),
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.host_long_chirp_cycles (T_CHIRP),
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.host_long_listen_cycles (T_LISTEN),
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.host_guard_cycles (T_GUARD),
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.host_chirps_per_subframe (CHIRPS_PER_SUBFRAME),
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.mixers_enable (mixers_enable),
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.beam_ready_async (beam_ready_async),
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.host_handshake_enable (handshake_enable),
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.wave_sel (wave_sel),
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.chirp_pulse (chirp_pulse),
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.subframe_pulse (subframe_pulse),
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.frame_pulse (frame_pulse),
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.chirp_counter (chirp_counter),
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.subframe_id (subframe_id),
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.cfg_chirp_cycles (cfg_chirp_cycles),
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.cfg_listen_cycles (cfg_listen_cycles),
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.cfg_guard_cycles (cfg_guard_cycles),
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.beam_handshake_watchdog_fired(watchdog_fired)
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);
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// ---- Bookkeeping ----
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integer pass = 0;
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integer fail = 0;
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integer frame_pulse_count = 0;
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always @(posedge clk) if (frame_pulse) frame_pulse_count = frame_pulse_count + 1;
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task check;
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input [255:0] label;
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input cond;
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begin
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if (cond) begin
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$display(" [PASS] %0s", label);
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pass = pass + 1;
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end else begin
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$display(" [FAIL] %0s", label);
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fail = fail + 1;
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end
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end
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endtask
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// Wait for the FSM to enter S_BEAM_WAIT (state == 3'd5).
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task wait_for_beam_wait;
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input integer timeout_cycles;
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integer i;
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begin
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i = 0;
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while (dut.state !== 3'd5 && i < timeout_cycles) begin
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@(posedge clk);
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i = i + 1;
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end
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end
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endtask
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// Wait for state to leave S_BEAM_WAIT (timeout reports failure to caller).
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task wait_for_beam_wait_exit;
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input integer timeout_cycles;
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integer i;
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begin
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i = 0;
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while (dut.state === 3'd5 && i < timeout_cycles) begin
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@(posedge clk);
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i = i + 1;
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end
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end
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endtask
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// Wait for at least N frames to complete (frame_pulse_count >= target).
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task wait_frames;
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input integer target;
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input integer timeout_cycles;
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integer i;
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begin
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i = 0;
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while (frame_pulse_count < target && i < timeout_cycles) begin
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@(posedge clk);
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i = i + 1;
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end
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end
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endtask
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// =========================================================================
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// MAIN
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// =========================================================================
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initial begin
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$dumpfile("tb_chirp_scheduler_handshake.vcd");
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$dumpvars(0, tb_chirp_scheduler_handshake);
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$display("============================================================");
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$display(" CHIRP_SCHEDULER beam-ready handshake (PR-AB.b expanded c5)");
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$display("============================================================");
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// Reset
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reset_n = 1'b0;
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mixers_enable = 1'b0;
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handshake_enable = 1'b0;
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beam_ready_async = 1'b0;
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repeat (4) @(posedge clk);
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reset_n = 1'b1;
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@(posedge clk);
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check("T1: post-reset watchdog sticky low", watchdog_fired == 1'b0);
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// ====================================================================
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// T2: Legacy mode (handshake_enable=0) — frames advance back-to-back,
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// S_BEAM_WAIT must never be visited.
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// ====================================================================
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$display("--- T2: legacy open-loop (handshake_enable=0) ---");
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mixers_enable = 1'b1;
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frame_pulse_count = 0;
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wait_frames(3, 5000);
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check("T2: at least 3 frames fired without handshake", frame_pulse_count >= 3);
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check("T2: watchdog sticky still low", watchdog_fired == 1'b0);
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// Park the scheduler in IDLE so the next test starts clean.
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mixers_enable = 1'b0;
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repeat (5) @(posedge clk);
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frame_pulse_count = 0;
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// ====================================================================
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// T3: Handshake enabled — scheduler should enter S_BEAM_WAIT after
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// the next frame_pulse and only exit on a beam_ready edge.
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// ====================================================================
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$display("--- T3: handshake enabled, MCU toggles before watchdog ---");
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handshake_enable = 1'b1;
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mixers_enable = 1'b1;
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wait_for_beam_wait(5000);
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check("T3a: FSM entered S_BEAM_WAIT after a frame_pulse",
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dut.state == 3'd5);
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// Sit in S_BEAM_WAIT for a deliberate number of cycles; the scheduler
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// must stay parked until we toggle beam_ready_async.
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repeat (200) @(posedge clk);
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check("T3b: FSM still in S_BEAM_WAIT after 200 idle cycles",
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dut.state == 3'd5);
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check("T3b: watchdog has not fired", watchdog_fired == 1'b0);
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// Toggle beam_ready_async and verify exit within a handful of clk
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// edges (2-FF sync + 1-cycle edge latch + S_BEAM_WAIT → S_CHIRP).
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@(posedge clk); beam_ready_async = 1'b1;
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wait_for_beam_wait_exit(50);
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check("T3c: FSM left S_BEAM_WAIT after PD8 toggle (rising)",
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dut.state != 3'd5);
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// ====================================================================
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// T4: Second toggle exits a later wait (verifies edge-detect handles
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// falling edges symmetrically — HAL_GPIO_TogglePin gives both).
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// ====================================================================
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$display("--- T4: second wait, falling-edge ack ---");
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wait_for_beam_wait(5000);
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check("T4a: FSM re-entered S_BEAM_WAIT on next frame", dut.state == 3'd5);
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@(posedge clk); beam_ready_async = 1'b0; // falling edge
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wait_for_beam_wait_exit(50);
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check("T4b: FSM left S_BEAM_WAIT after PD8 toggle (falling)",
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dut.state != 3'd5);
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// ====================================================================
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// T5: Watchdog timeout. The real 23-bit terminal value (8M cycles ≈
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// 80 ms) is unreachable in iverilog sim time, so we force the
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// FSM's counter to the terminal value and let one clk edge
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// resolve the (counter >= BEAM_WATCHDOG_MAX) branch.
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// ====================================================================
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$display("--- T5: watchdog auto-advance + sticky latch ---");
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wait_for_beam_wait(5000);
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check("T5a: FSM in S_BEAM_WAIT (pre-force)", dut.state == 3'd5);
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// Force the counter to BEAM_WATCHDOG_MAX so the FSM's >= comparison
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// trips on the next posedge; then release immediately so the always
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// block can drive normally on the same edge.
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@(negedge clk);
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force dut.beam_watchdog = 23'd8_000_000;
|
||||
@(posedge clk); #1;
|
||||
release dut.beam_watchdog;
|
||||
check("T5b: watchdog sticky latched after timeout",
|
||||
watchdog_fired == 1'b1);
|
||||
check("T5c: FSM left S_BEAM_WAIT after watchdog",
|
||||
dut.state != 3'd5);
|
||||
|
||||
// ====================================================================
|
||||
// T6: Sticky survives mixers_enable=0 cycle (only reset_n clears it).
|
||||
// ====================================================================
|
||||
$display("--- T6: sticky watchdog is reset-only ---");
|
||||
mixers_enable = 1'b0;
|
||||
repeat (20) @(posedge clk);
|
||||
check("T6a: watchdog sticky stays high across mixers_enable=0",
|
||||
watchdog_fired == 1'b1);
|
||||
mixers_enable = 1'b1;
|
||||
|
||||
// ====================================================================
|
||||
// T7: Mid-wait disable releases the FSM (handshake_enable→0).
|
||||
// ====================================================================
|
||||
$display("--- T7: mid-wait host_handshake_enable=0 releases FSM ---");
|
||||
wait_for_beam_wait(5000);
|
||||
check("T7a: FSM in S_BEAM_WAIT for disable test", dut.state == 3'd5);
|
||||
@(posedge clk); handshake_enable = 1'b0;
|
||||
wait_for_beam_wait_exit(20);
|
||||
check("T7b: FSM left S_BEAM_WAIT after handshake disable",
|
||||
dut.state != 3'd5);
|
||||
|
||||
// ====================================================================
|
||||
// T8: Full reset clears sticky.
|
||||
// ====================================================================
|
||||
$display("--- T8: reset_n clears watchdog sticky ---");
|
||||
reset_n = 1'b0;
|
||||
repeat (4) @(posedge clk);
|
||||
check("T8: watchdog sticky cleared by reset_n", watchdog_fired == 1'b0);
|
||||
reset_n = 1'b1;
|
||||
repeat (4) @(posedge clk);
|
||||
|
||||
$display("============================================================");
|
||||
$display("RESULTS: pass=%0d fail=%0d", pass, fail);
|
||||
$display("============================================================");
|
||||
if (fail == 0) $display("[OVERALL] PASS");
|
||||
else $display("[OVERALL] FAIL");
|
||||
$finish;
|
||||
end
|
||||
|
||||
initial begin
|
||||
#1_000_000; // 1 ms wall-clock safety
|
||||
$display("[FATAL] timeout");
|
||||
$finish;
|
||||
end
|
||||
|
||||
endmodule
|
||||
@@ -361,6 +361,7 @@ module tb_e2e_dsp_to_host;
|
||||
.status_agc_enable (1'b0),
|
||||
.status_range_decim_watchdog(1'b0),
|
||||
.status_ddc_cic_fir_overrun (1'b0),
|
||||
.status_beam_handshake_watchdog(1'b0), // commit 5 — tied off, e2e path doesn't model handshake
|
||||
.status_cfar_alpha_soft (TEST_CFAR_ALPHA_SOFT),
|
||||
.status_detect_threshold_soft(17'd0),
|
||||
.status_detect_count_cand (16'd0)
|
||||
|
||||
@@ -150,6 +150,8 @@ module tb_ft2232h_frame_drop;
|
||||
// AUDIT-S10: control-fault flags tied off (frame-drop TB scope)
|
||||
.status_range_decim_watchdog(1'b0),
|
||||
.status_ddc_cic_fir_overrun(1'b0),
|
||||
// PR-AB.b expanded commit 5: beam-handshake watchdog tied off
|
||||
.status_beam_handshake_watchdog(1'b0),
|
||||
// PR-G: 2-tier CFAR telemetry tied off
|
||||
.status_cfar_alpha_soft(8'h18), // RP_DEF_CFAR_ALPHA_SOFT
|
||||
.status_detect_threshold_soft(17'd0),
|
||||
|
||||
@@ -185,7 +185,14 @@ radar_receiver_final dut (
|
||||
.doppler_frame_done_out(),
|
||||
|
||||
// PR-E: pin mixers_enable HIGH so the scheduler runs in this TB
|
||||
.mixers_enable_100m(1'b1)
|
||||
.mixers_enable_100m(1'b1),
|
||||
|
||||
// PR-AB.b expanded commit 5: beam-ready handshake — tie off for this TB
|
||||
// (legacy open-loop cadence). Tests for the handshake live in their own
|
||||
// dedicated tb_chirp_scheduler_handshake.v unit TB.
|
||||
.stm32_beam_ready_async(1'b0),
|
||||
.host_handshake_enable(1'b0),
|
||||
.beam_handshake_watchdog_fired()
|
||||
);
|
||||
|
||||
// ============================================================================
|
||||
|
||||
@@ -16,7 +16,11 @@
|
||||
// mixer-disable propagation)
|
||||
// G7.3 TX chirp counter CDC (120MHz -> 100MHz)
|
||||
// — G7.1 (STM32→FPGA chirp toggle CDC stress) retired in PR-AB.b
|
||||
// expanded; stm32_new_chirp port is gone.
|
||||
// expanded; the stm32_new_chirp port was renamed to
|
||||
// stm32_beam_ready in commit 5 (beam-ready handshake) and is
|
||||
// tied 1'b0 here so the cold-reset default of host_handshake_enable
|
||||
// (=0) keeps the FSM out of S_BEAM_WAIT and the open-loop cadence
|
||||
// intact.
|
||||
//
|
||||
// DUT is radar_system_top with USB_MODE=1 (production FT2232H path); the
|
||||
// FT2232H ports are wired so a stream_control opcode (0x04) can be sent at
|
||||
@@ -155,6 +159,7 @@ radar_system_top #(.USB_MODE(1)) dut (
|
||||
.adc_or_p(1'b0), .adc_or_n(1'b1),
|
||||
.adc_pwdn(adc_pwdn),
|
||||
|
||||
.stm32_beam_ready(1'b0), // commit 5: handshake disabled by cold-reset default
|
||||
.stm32_mixers_enable(stm32_mixers_enable),
|
||||
|
||||
.ft601_data(ft601_data),
|
||||
|
||||
@@ -158,6 +158,7 @@ radar_system_top #(
|
||||
.adc_or_p(1'b0), .adc_or_n(1'b1),
|
||||
.adc_pwdn(adc_pwdn),
|
||||
|
||||
.stm32_beam_ready(1'b0), // commit 5: handshake gated off by host_handshake_enable cold-reset = 0
|
||||
.stm32_mixers_enable(stm32_mixers_enable),
|
||||
|
||||
// FT601 ports — tied off / unused in USB_MODE=1
|
||||
|
||||
@@ -144,7 +144,9 @@ module tb_usb_data_interface;
|
||||
.status_agc_enable (status_agc_enable),
|
||||
// AUDIT-S10: control-fault flags tied off (pre-existing TB scope)
|
||||
.status_range_decim_watchdog(1'b0),
|
||||
.status_ddc_cic_fir_overrun (1'b0)
|
||||
.status_ddc_cic_fir_overrun (1'b0),
|
||||
// PR-AB.b expanded commit 5: beam-handshake watchdog tied off
|
||||
.status_beam_handshake_watchdog(1'b0)
|
||||
);
|
||||
|
||||
// ── Test bookkeeping ───────────────────────────────────────
|
||||
|
||||
@@ -157,6 +157,10 @@ module tb_usb_protocol_v2;
|
||||
.status_agc_enable(status_agc_enable),
|
||||
.status_range_decim_watchdog(status_range_decim_watchdog),
|
||||
.status_ddc_cic_fir_overrun(status_ddc_cic_fir_overrun),
|
||||
// PR-AB.b expanded commit 5: beam-handshake watchdog tied off here;
|
||||
// exercised by tb_chirp_scheduler_handshake.v and word-4 layout test
|
||||
// refreshed below.
|
||||
.status_beam_handshake_watchdog(1'b0),
|
||||
.status_cfar_alpha_soft(status_cfar_alpha_soft),
|
||||
.status_detect_threshold_soft(status_detect_threshold_soft),
|
||||
.status_detect_count_cand(status_detect_count_cand)
|
||||
|
||||
Reference in New Issue
Block a user