PR-AB.b expanded commit 6: subframe_pulse strip + stale MCU DIAG cleanup

Final cleanup pass for the PR-AB.b expanded bundle.

chirp_scheduler.v / radar_receiver_final.v: delete the unused subframe_pulse
output + its sibling subframe_id port. Both were declared on the scheduler
and bound at the radar_receiver_final.sched instance, but no downstream
module read them -- doppler_processor counts sub-frame boundaries
internally from new_chirp_frame + CHIRPS_PER_SUBFRAME=16. The stale
"// doppler picks up in PR-F" comment was aspirational; PR-F never wired
it. subframe_id demoted from output port to internal reg (still consumed
by the FSM's next_enabled_subframe helper).

tb_chirp_scheduler_handshake.v: drop the matching observer wires + port
bindings.

main.cpp: replace the F-2.1 "host_radar_mode = 2'b01 (auto-scan, FPGA-owned
chirp dispatch)" boot DIAG + 8-line comment block with a short comment
noting the mode register was retired in commit 1. The DIAG was asserting a
register that no longer exists.

Regression:
- FPGA iverilog: 43/0/0 (tb_chirp_scheduler_handshake 16/16)
- MCU: 51/0 (GPS) + 34/0 (AGC/safety/gap-3)

Closes the PR-AB.b expanded bundle (commits 1-6) on feat/dual-range-v2.

9_Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.cpp

@@ -1857,15 +1857,11 @@ int main(void)
   HAL_GPIO_WritePin(GPIOD, GPIO_PIN_12, GPIO_PIN_SET);
   DIAG("FPGA", "FPGA reset complete -- adar_tr_x driven LOW (RX commanded)");
 
-  /* F-2.1: this firmware build supports only FPGA mode 2'b01 (RP_MODE_AUTO_3KM,
-   * the cold-reset default at radar_system_top.v:1058). The MCU does not
-   * dispatch chirps -- chirp_scheduler.v owns the SHORT/MEDIUM/LONG ladder.
-   * Mode 2'b00 (STM32 pass-through) is supported on the FPGA side but is
-   * NOT implemented in this firmware: a real pass-through would need a
-   * hardware-timer-driven PD8 emitter (software delay_us is too jittery
-   * for Doppler) plus MCU<->FPGA agreement on host_chirps_per_subframe.
-   * Operators must not change host_radar_mode away from 2'b01. */
-  DIAG("FPGA", "Production mode: host_radar_mode = 2'b01 (auto-scan, FPGA-owned chirp dispatch)");
+  /* The MCU does not dispatch chirps -- chirp_scheduler.v owns the
+   * SHORT/MEDIUM/LONG ladder unconditionally. The legacy host_radar_mode
+   * register and its 2'b00 (STM32 pass-through) / 2'b10 (single-chirp debug)
+   * / 2'b11 (track dwell) branches were retired in PR-AB.b expanded commit 1
+   * (2026-05-11); auto-scan is now the only behavior. */
 
 // Initialize module IMU
   DIAG_SECTION("IMU INIT (GY-85)");