Jason a577b7628b Fix staggered-PRF Doppler processing with dual 16-point FFTs

2026-03-27 23:05:28 +02:00

..

constraints

add TE0713+UMFT601X-B FT601 integration dev bitstream (timing clean)

2026-03-21 20:43:52 +02:00

formal

Fix staggered-PRF Doppler processing with dual 16-point FFTs

2026-03-27 23:05:28 +02:00

scripts

add TE0713+UMFT601X-B FT601 integration dev bitstream (timing clean)

2026-03-21 20:43:52 +02:00

tb

Fix staggered-PRF Doppler processing with dual 16-point FFTs

2026-03-27 23:05:28 +02:00

.gitignore

…

ad9484_interface_400m.v

…

adc_clk_mmcm_integration.md

…

adc_clk_mmcm.v

…

cdc_modules.v

…

cfar_ca.v

…

chirp_memory_loader_param.v

…

cic_decimator_4x_enhanced.v

…

dac_interface_single.v

…

ddc_400m.v

…

ddc_input_interface.v

…

doppler_processor.v

Fix staggered-PRF Doppler processing with dual 16-point FFTs

2026-03-27 23:05:28 +02:00

edge_detector.v

…

fft_engine.v

…

fft_twiddle_16.mem

Fix staggered-PRF Doppler processing with dual 16-point FFTs

2026-03-27 23:05:28 +02:00

fft_twiddle_32.mem

…

fft_twiddle_1024.mem

…

fir_lowpass.v

…

fpga_self_test.v

Add radar dashboard GUI with replay mode for real ADI CN0566 data visualization, FPGA self-test module, and co-sim npy arrays

2026-03-20 19:02:06 +02:00

frequency_matched_filter.v

…

latency_buffer.v

…

long_chirp_lut.mem

…

long_chirp_seg0_i.mem

…

long_chirp_seg0_q.mem

…

long_chirp_seg1_i.mem

…

long_chirp_seg1_q.mem

…

long_chirp_seg2_i.mem

…

long_chirp_seg2_q.mem

…

long_chirp_seg3_i.mem

…

long_chirp_seg3_q.mem

…

matched_filter_multi_segment.v

…

matched_filter_processing_chain.v

…

mti_canceller.v

…

nco_400m_enhanced.v

…

plfm_chirp_controller.v

…

radar_mode_controller.v

…

radar_receiver_final.v

Add radar dashboard GUI with replay mode for real ADI CN0566 data visualization, FPGA self-test module, and co-sim npy arrays

2026-03-20 19:02:06 +02:00

radar_system_top_te0712_dev.v

…

radar_system_top_te0713_dev.v

…

radar_system_top_te0713_umft601x_dev.v

add TE0713+UMFT601X-B FT601 integration dev bitstream (timing clean)

2026-03-21 20:43:52 +02:00

radar_system_top.v

Wire self-test results (0x31) to USB status readback path, add fpga_self_test to regression

2026-03-20 20:03:11 +02:00

radar_transmitter.v

…

range_bin_decimator.v

…

run_regression.sh

Wire self-test results (0x31) to USB status readback path, add fpga_self_test to regression

2026-03-20 20:03:11 +02:00

rx_gain_control.v

…

short_chirp_i.mem

…

short_chirp_q.mem

…

usb_data_interface.v

Wire self-test results (0x31) to USB status readback path, add fpga_self_test to regression

2026-03-20 20:03:11 +02:00

xfft_16.v

Fix staggered-PRF Doppler processing with dual 16-point FFTs

2026-03-27 23:05:28 +02:00

xfft_32.v

…