build(mcu): add linker script + USB CDC glue (PR 2 — firmware links)

Closes the link for the STM32F746ZGT7 bring-up:

- linker/STM32F746ZGTx_FLASH.ld: 1 MB flash @ 0x08000000, 256 KB RAM @
  0x20010000 (SRAM1+SRAM2 contiguous), 64 KB DTCM for stack/heap, 16 KB
  ITCM. Standard Cube-style section layout.
- 9_1_3_C_Cpp_Code/usb_device.{h,c}: MX_USB_DEVICE_Init wiring CDC class
  + interface into hUsbDeviceFS.
- 9_1_3_C_Cpp_Code/usbd_conf.{h,c}: HAL PCD bridge — hpcd_USB_OTG_FS,
  USBD_LL_* callbacks, HAL_PCD_MspInit (PA11/PA12 AF10, OTG_FS clock,
  OTG_FS_IRQn), static allocator for USBD_malloc.
- 9_1_3_C_Cpp_Code/usbd_desc.{h,c}: device + string descriptors, VID
  0x0483 / PID 0x5740 (STM32 VCP), serial derived from 96-bit UID.
- 9_1_3_C_Cpp_Code/usbd_cdc_if.{h,c}: CDC_Transmit_FS + class callbacks;
  host-to-device bytes forwarded via weak CDC_on_receive hook so
  USBHandler can override from C++ without a hard dep.

Makefile:
- default target now 'link' (produces firmware.elf/.bin/.hex).
- APP_CPP no longer excludes main.cpp; LIB_CPP no longer excludes
  gps_handler.cpp.
- USB_C picks up Core + CDC class .c files (minus *_template.c).
- Drops vendor system_stm32f7xx.c — the app-customised copy in
  9_1_1_C_Cpp_Libraries/ is the real one; keeping both caused duplicate
  symbols.

Incidental fixes to main.cpp (pre-existing bugs exposed by first real
compile):
- DIAG_GPIO at main.cpp:662-663 was called with 3 args; macro takes
  (subsys, name, port, pin). Passed the STATUS0/STATUS1 port+pin pair.
- PI used at main.cpp:1589-1594 for atan2 conversions but never
  defined. Added a local #define PI 3.14159265358979323846f near the
  top of the file.

Result: firmware.elf = 118 548 B text / 776 B data / 12 672 B bss.
Fits comfortably in 1 MB flash; DTCM stack/heap clears 64 KB with room.

9_Firmware/9_1_Microcontroller/linker/STM32F746ZGTx_FLASH.ld

@@ -0,0 +1,134 @@
+/*
+******************************************************************************
+** STM32F746ZGTx linker script (AERIS-10 PR 2)
+**
+** Memory layout (STM32F746ZGT7, LQFP144, 1 MB flash / 320 KB RAM):
+**   ITCM    : 0x00000000, 16 KB  (CPU tightly-coupled instruction RAM)
+**   FLASH   : 0x08000000,  1 MB
+**   DTCM    : 0x20000000, 64 KB  (CPU tightly-coupled data RAM — stack/heap)
+**   RAM     : 0x20010000,256 KB  (SRAM1 240 KB + SRAM2 16 KB contiguous)
+**
+** Entry: Reset_Handler (from vendor/cmsis_device_f7 startup).
+** Heap:  grows up from _end.  Stack: grows down from end of DTCM (_estack).
+******************************************************************************
+*/
+
+ENTRY(Reset_Handler)
+
+_estack       = ORIGIN(DTCM) + LENGTH(DTCM);   /* top of DTCM for MSP */
+_Min_Heap_Size  = 0x200;
+_Min_Stack_Size = 0x400;
+
+MEMORY
+{
+  ITCM (rx)   : ORIGIN = 0x00000000, LENGTH = 16K
+  FLASH (rx)  : ORIGIN = 0x08000000, LENGTH = 1024K
+  DTCM (rw)   : ORIGIN = 0x20000000, LENGTH = 64K
+  RAM (rw)    : ORIGIN = 0x20010000, LENGTH = 256K
+}
+
+SECTIONS
+{
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector))
+    . = ALIGN(4);
+  } >FLASH
+
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)
+    *(.text*)
+    *(.glue_7)
+    *(.glue_7t)
+    *(.eh_frame)
+    KEEP (*(.init))
+    KEEP (*(.fini))
+    . = ALIGN(4);
+    _etext = .;
+  } >FLASH
+
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)
+    *(.rodata*)
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
+  .ARM       : { __exidx_start = .; *(.ARM.exidx*) __exidx_end = .; } >FLASH
+
+  .preinit_array :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } >FLASH
+
+  .init_array :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } >FLASH
+
+  .fini_array :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } >FLASH
+
+  _sidata = LOADADDR(.data);
+
+  .data :
+  {
+    . = ALIGN(4);
+    _sdata = .;
+    *(.data)
+    *(.data*)
+    . = ALIGN(4);
+    _edata = .;
+  } >DTCM AT> FLASH
+
+  .bss (NOLOAD) :
+  {
+    . = ALIGN(4);
+    _sbss = .;
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+    . = ALIGN(4);
+    _ebss = .;
+    __bss_end__ = _ebss;
+  } >DTCM
+
+  ._user_heap_stack (NOLOAD) :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >DTCM
+
+  /* Larger buffers can be placed in .sram using __attribute__((section(".sram"))) */
+  .sram (NOLOAD) :
+  {
+    . = ALIGN(4);
+    *(.sram)
+    *(.sram*)
+    . = ALIGN(4);
+  } >RAM
+
+  /DISCARD/ : { libc.a ( * ) libm.a ( * ) libgcc.a ( * ) }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}