AUDIT-C16: parameterize NUM_CELLS + sample_counter width for 200T

Pre-fix usb_data_interface.v hardcoded `localparam [14:0] NUM_CELLS =
15'd16384` for the 50T 512-range x 32-doppler layout. On 200T builds
with SUPPORT_LONG_RANGE defined, RP_MAX_OUTPUT_BINS=4096 makes a real
frame 131072 cells, so the fixed value caused two distinct defects:

  (a) value: counter wrapped 8x per real frame; bit-7 frame-start
      marker fired 8x at incorrect host-frame offsets, silently
      desyncing the GUI parser
  (b) width: 15 bits could not represent 131072 (needs 17 bits)

Fix: derive NUM_CELLS = RP_MAX_OUTPUT_BINS * RP_NUM_DOPPLER_BINS and
counter width = RP_DOPPLER_MEM_ADDR_W (14 on 50T, 17 on 200T) from
radar_params.vh, so both scale together with the build define.

Tests:
- tb_audit_c16_num_cells.v: standalone counter-block exerciser (T1
  reset, T2 increment, T3 wrap at NUM_CELLS-1, T4 exactly 2 markers
  across 2*NUM_CELLS ticks, T5 top-bit observability) -- 6/6 PASS at
  both 50T (NUM_CELLS=16384, CTR_W=14) and 200T (131072, 17).
- tb_usb_data_interface.v: existing test 7-8 retargeted from the old
  hardcoded `>=15` / `==15'd16384` invariant to the new parameterized
  one (`==RP_DOPPLER_MEM_ADDR_W` / `==RP_MAX_OUTPUT_BINS*RP_NUM_DOPPLER_BINS`).

Regression: 41/41 PASS (+2 new entries: 50T default + 200T
`+define+SUPPORT_LONG_RANGE`).

9_Firmware/9_2_FPGA/run_regression.sh

@@ -566,6 +566,15 @@ run_test "GPIO dig5/dig7 split (AUDIT-S10)" \
     tb/tb_audit_s10_gpio_split.vvp \
     tb/tb_audit_s10_gpio_split.v
 
+run_test "NUM_CELLS sizing 50T (AUDIT-C16)" \
+    tb/tb_audit_c16_num_cells_50t.vvp \
+    tb/tb_audit_c16_num_cells.v
+
+run_test --timeout=120 "NUM_CELLS sizing 200T (AUDIT-C16)" \
+    tb/tb_audit_c16_num_cells_200t.vvp \
+    -DSUPPORT_LONG_RANGE \
+    tb/tb_audit_c16_num_cells.v
+
 echo ""
 
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