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chirp-v2 PR-D: chirp_scheduler replaces radar_mode_controller; MF/MTI wave_sel-native
Single 100 MHz scheduler emits wave_sel[1:0] and chirp_pulse natively. Modes 00 (STM32 pass-through), 01 (auto-scan over SHORT/MEDIUM/LONG sub-frames), 10 (single-chirp debug), 11 (track dwell with watchdog scan-fallback after RP_DEF_TRACK_WATCHDOG_FRAMES=5 idle frames). Sub-frame mask lets ops drop a waveform without recompiling. Drops the receiver_final wave_sel shim added in PR-C: wave_sel comes straight from the scheduler; chirp_pulse replaces the old mc_new_chirp toggle + XOR edge converter. matched_filter_multi_segment and mti_canceller take wave_sel[1:0] and chirp_pulse directly — no parallel paths. multi_segment also bumped: SHORT_CHIRP_SAMPLES 50 -> 100 (V2 1 us SHORT) and MEDIUM_CHIRP_SAMPLES = 500 (5 us). LONG path unchanged. Dead mc_new_elevation/azimuth XOR converters removed. Deletes radar_mode_controller.v, formal/fv_radar_mode_controller.v, and tb/tb_radar_mode_controller.v. Build manifests (run_regression.sh, scripts/200t/build_200t.tcl) updated. Receiver_final pins medium/track/ subframe_enable inputs to RP_DEF_* defaults until PR-G plumbs USB opcodes. Verification: - tb_rxb_fullchain_latency: peak |I|+|Q|=24033 at bin 0, ~80x peak/mean (up from PR-C's 15115 since matched filter now uses full 100 SHORT samples) - tb_mti_canceller: 43/43 PASS with new wave_sel[1:0] input - tb_radar_receiver_final: 8/8 PASS, ALL TESTS PASSED - tb_system_e2e: 34/49 PASS - identical to pre-PR-D baseline (15 failures are pre-existing matched-filter cycle-budget skips); G8.2/G8.3 chirp_scheduler probes PASS - tb_multiseg_cosim: 16/32 - same as pre-PR-D baseline
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@@ -68,7 +68,7 @@ set rtl_files [list \
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"${rtl_dir}/matched_filter_processing_chain.v" \
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"${rtl_dir}/nco_400m_enhanced.v" \
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"${rtl_dir}/plfm_chirp_controller.v" \
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"${rtl_dir}/radar_mode_controller.v" \
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"${rtl_dir}/chirp_scheduler.v" \
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"${rtl_dir}/radar_receiver_final.v" \
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"${rtl_dir}/radar_system_top.v" \
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"${rtl_dir}/radar_transmitter.v" \
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