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PR-AB.b expanded commit 1: RTL strip (dead modes + counters + range_mode)

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Flatten chirp_scheduler.v to single-FSM auto-scan. Mode 00 (STM32 pass-through),
mode 10 (single-chirp debug) and mode 11 (track dwell) FSM branches were all
half-implemented and unreachable in production: MCU dispatcher was deleted in
F-2.1; mode 11 inputs were tied to constants in radar_receiver_final; mode 10
debug_wave_sel was hardcoded to SHORT. The case-switch wrapper, watchdog,
effective_mode mux, and all host_track_* / host_debug_wave_sel / host_trigger
plumbing are removed.

Strip host_radar_mode (opcode 0x01), host_trigger_pulse (opcode 0x02), and
host_range_mode (opcode 0x20). The mode register had no consumer after the
single-mode flatten; the range_mode register was already write-only telemetry
(declared as input in radar_receiver_final but never read). The runtime 3km vs
20km presentation on a 200T build is driven by host_subframe_enable (0x19) +
per-waveform chirp/listen cycles (0x10-0x18) — no separate mode field needed.

Strip stm32_new_elevation / stm32_new_azimuth GPIOs and the elevation_counter /
azimuth_counter regs in plfm_chirp_controller_v2. The FPGA-side counters had no
consumer (status pack never carried them; on 50T they went to _nc; on 200T to
unconstrained outputs). MCU software counters n/y reach the GUI via USB-CDC
on a separate channel.

USB status word 0 bits [23:22] (was radar_mode) and word 4 bits [1:0] (was
range_mode) are now reserved zeros — host parser keeps the same byte offsets.

Files modified:
  chirp_scheduler.v               - flatten to single FSM (~155 LOC delta)
  plfm_chirp_controller_v2.v      - strip counter blocks + ports
  radar_transmitter.v             - strip elev/azim CDC + edge detectors + ports
  radar_receiver_final.v          - strip host_mode/range_mode/trigger + STM32 toggle ports
  radar_system_top.v              - strip regs, opcodes 0x01/0x02/0x20, status_*_mode wiring, top-level ports
  radar_system_top_50t.v          - strip _nc wires + stm32_new_elev/azim + tie-offs
  radar_system_top_te0713_umft601x_dev.v - strip status_radar_mode/range_mode ties
  usb_data_interface.v            - drop status_*_mode ports, reserve word 0 [23:22] + word 4 [1:0]
  usb_data_interface_ft2232h.v    - same as above
  radar_params.vh                 - strip RP_MODE_* / RP_RANGE_MODE_* / RP_OP_RADAR_MODE / RP_OP_TRIGGER_PULSE / RP_OP_RANGE_MODE / RP_DEF_TRACK_*

Regression will fail at this commit due to TB references to deleted signals
(host_radar_mode, status_range_mode, etc.) — TB cleanup follows in commit 2.
This commit is contained in:
Jason
2026-05-11 10:24:20 +05:45
parent a718e00475
commit 1b2a21d55b
10 changed files with 127 additions and 565 deletions
Download Patch File Download Diff File Expand all files Collapse all files
9_Firmware/9_2_FPGA/radar_transmitter.v
+9 -67
View File
@@ -12,22 +12,17 @@
// - frame_pulse → toggle CDC → 1-cycle pulse on clk_120m_dac for
// chirp_counter clear and the new_chirp_frame status output.
//
// Beam steering:
// stm32_new_elevation / stm32_new_azimuth still run through edge detectors
// on clk_100m and feed the controller's internal beam counters. These are
// independent of the chirp FSM and unchanged from chirp-v1.
//
// stm32_new_chirp:
// Removed from this module — the scheduler in receiver_final now owns chirp
// timing. The top-level GPIO is still wired to receiver_final via
// stm32_new_chirp_rx; the transmitter has no separate path.
// Beam-step GPIOs (stm32_new_elevation / stm32_new_azimuth) were retired
// in PR-AB.b expanded (2026-05-11). The FPGA-side elev/az counters they
// drove had no host consumer (status pack didn't carry them, GUI reads
// MCU software counters via USB-CDC instead). PD9 / PD10 are now free.
//////////////////////////////////////////////////////////////////////////////////
module radar_transmitter(
// System Clocks
input wire clk_100m, // System clock
input wire clk_120m_dac, // 120MHz DAC clock
input wire reset_n, // Reset synchronized to clk_120m_dac
input wire reset_100m_n, // Reset synchronized to clk_100m (for edge detectors/CDC)
input wire reset_100m_n, // Reset synchronized to clk_100m (for CDC)
// DAC Interface
output wire [7:0] dac_data,
@@ -41,9 +36,7 @@ module radar_transmitter(
input wire sched_chirp_pulse,
input wire sched_frame_pulse,
// STM32 Control Interface (chirp moved to scheduler; beam-step still here)
input wire stm32_new_elevation,
input wire stm32_new_azimuth,
// STM32 master enable (mixers_enable, CDC-synced to clk_120m_dac here)
input wire stm32_mixers_enable,
output wire fpga_rf_switch,
@@ -79,9 +72,7 @@ module radar_transmitter(
output wire stm32_cs_adar3_1v8,
output wire stm32_cs_adar4_1v8,
// Beam Position Tracking
output wire [5:0] current_elevation,
output wire [5:0] current_azimuth,
// Live chirp-index telemetry (clk_120m_dac, sync'd back at top level)
output wire [5:0] current_chirp,
output wire new_chirp_frame
);
@@ -98,14 +89,6 @@ assign stm32_cs_adar2_1v8 = stm32_cs_adar2_3v3;
assign stm32_cs_adar3_1v8 = stm32_cs_adar3_3v3;
assign stm32_cs_adar4_1v8 = stm32_cs_adar4_3v3;
// Beam-step edge detection (STM32 GPIO -> clk_100m pulses)
wire new_elevation_pulse;
wire new_azimuth_pulse;
// CDC: Synchronized versions of async STM32 GPIO inputs to clk_100m
wire stm32_new_elevation_sync;
wire stm32_new_azimuth_sync;
// CDC: stm32_mixers_enable into clk_120m_dac domain
wire mixers_enable_120m;
@@ -182,47 +165,12 @@ cdc_single_bit #(.STAGES(3)) cdc_mixers_en_120m (
.dst_signal(mixers_enable_120m)
);
// ============================================================================
// Beam-step CDC + edge detection (clk_100m, unchanged from v1)
// ============================================================================
cdc_single_bit #(.STAGES(2)) cdc_stm32_elevation (
.src_clk(clk_100m),
.dst_clk(clk_100m),
.reset_n(reset_100m_n),
.src_signal(stm32_new_elevation),
.dst_signal(stm32_new_elevation_sync)
);
cdc_single_bit #(.STAGES(2)) cdc_stm32_azimuth (
.src_clk(clk_100m),
.dst_clk(clk_100m),
.reset_n(reset_100m_n),
.src_signal(stm32_new_azimuth),
.dst_signal(stm32_new_azimuth_sync)
);
edge_detector_enhanced elevation_edge (
.clk(clk_100m),
.reset_n(reset_100m_n),
.signal_in(stm32_new_elevation_sync),
.rising_falling_edge(new_elevation_pulse)
);
edge_detector_enhanced azimuth_edge (
.clk(clk_100m),
.reset_n(reset_100m_n),
.signal_in(stm32_new_azimuth_sync),
.rising_falling_edge(new_azimuth_pulse)
);
// ============================================================================
// PLFM Chirp Generator (chirp-v2)
// ============================================================================
plfm_chirp_controller_v2 plfm_chirp_inst (
.clk_120m (clk_120m_dac),
.clk_100m (clk_100m),
.reset_n (reset_n),
.reset_100m_n (reset_100m_n),
.mixers_enable (mixers_enable_120m),
// Scheduler bridge (clk_120m_dac, post-CDC)
@@ -230,10 +178,6 @@ plfm_chirp_controller_v2 plfm_chirp_inst (
.dst_wave_sel (dst_wave_sel),
.frame_pulse_120m(frame_pulse_120m),
// Beam-step pulses (clk_100m)
.new_elevation (new_elevation_pulse),
.new_azimuth (new_azimuth_pulse),
// DAC outputs
.chirp_data (chirp_data),
.chirp_valid (chirp_valid),
@@ -257,10 +201,8 @@ plfm_chirp_controller_v2 plfm_chirp_inst (
.adar_tr_3 (adar_tr_3),
.adar_tr_4 (adar_tr_4),
// Status counters
.chirp_counter (current_chirp),
.elevation_counter(current_elevation),
.azimuth_counter (current_azimuth)
// Live chirp-index telemetry
.chirp_counter (current_chirp)
);
// ============================================================================