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fix(mcu): MCU-A5 — gate Idq health-window during PA calibration walk
The boot-time Idq calibration walks DAC_val from 126 down toward the 1.680 A target. Mid-walk readings sit well above the 2.5 A overcurrent threshold by design, and a channel that hits the safety_counter timeout (50 iters) can be left above the window. Without a gate, the next checkSystemHealth() pass would trip ERROR_RF_PA_OVERCURRENT and route straight into Emergency_Stop, killing the system mid-bringup. Added a `pa_calibration_in_progress` flag set TRUE around both DAC1 and DAC2 cal walks. checkSystemHealth's Idq window short-circuits while the flag is set; bias-fault and overcurrent thresholds remain fully active once the walk completes, so any genuinely stuck-high channel surfaces on the very next health pass and routes through the normal handler. Other health checks (lock, comm, temperature, watchdog) stay live during cal — no behavioural change to anything except the Idq window. Added test_mcu_a5_pa_cal_gate (7 cases): mid-walk masking, post-cal re-arming, stuck-high channel surfacing after gate clears, bias-fault gating, PowerAmplifier=false short-circuit, and a pre-fix regression case showing the buggy path would have tripped overcurrent mid-walk. MCU regression now 79/79.
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@@ -68,6 +68,7 @@ TESTS_STANDALONE := test_bug12_pa_cal_loop_inverted \
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test_bug16_runradar_shadows_globals \
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test_mcu_a1_cooling_hysteresis \
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test_mcu_a7_emergency_persist \
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test_mcu_a5_pa_cal_gate \
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test_gap3_iwdg_config \
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test_gap3_temperature_max \
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test_gap3_idq_periodic_reread \
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@@ -167,6 +168,9 @@ test_mcu_a1_cooling_hysteresis: test_mcu_a1_cooling_hysteresis.c
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test_mcu_a7_emergency_persist: test_mcu_a7_emergency_persist.c
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$(CC) $(CFLAGS) $< -o $@
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test_mcu_a5_pa_cal_gate: test_mcu_a5_pa_cal_gate.c
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$(CC) $(CFLAGS) $< -o $@
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# Gap-3 safety tests -- mock-only (needs spy log for GPIO sequence)
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test_gap3_emergency_stop_rails: test_gap3_emergency_stop_rails.c $(MOCK_OBJS)
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$(CC) $(CFLAGS) $(INCLUDES) $< $(MOCK_OBJS) -o $@
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